A typical capacitance transimpedance amplifier (CTIA)-based Infra-Red (IR) Read out Integrated Circuit (ROIC) pixel circuit 100 is shown in FIG. 1. The circuit 100 is connected to a photodetector, e.g. an infrared photodetector 99 as shown in FIG. 1. The circuit maintains a fixed reverse-bias on the IR Photodetector 99, while integrating the photocurrent from the photodetector 99.
A buffer amplifier 110 includes a feedback loop 106. The current from the infrared detector is integrated by the buffer amplifier. The feedback loop 106 includes a capacitor 105 that holds the current that has been integrated. The output 115 of the buffer amp is thus a voltage representative of the amount of current that has been integrated. This voltage is buffered by a source follower 120 that forms the pixel output.
An integration node is formed at the output of the buffer amplifier 110. In order to maintain consistency between pixels, the CTIA integration node voltage must be reset to a known value between integrations. This is done by shorting the input and output of the CTIA Opamp together using a controllable switch 125. During this reset phase, the Opamp then drives the output (integration node) to the same voltage that is on the positive input of the Opamp.
Typical imagers only reset one row of the pixel array at a time, even though the net integration time is the same for all the rows. This results in a time delta between start and end of integration from row-to-row. The end effect of this temporal delta is distortion of moving scenes. Certain applications need to maintain the image integrity of moving scenes.
A Snapshot or Frame Shutter operation operates to start and end integration at the same time for all the Pixels in the array.
Previous solutions have implemented a correlated double sampling operation from the downstream circuitry by performing two successive readouts from the Pixel.